This is a summary of all hardware work associated with the FONT project.
The goals of the hardware testing are to realise a working solution to provide a feedback system as outlined in the project overview and in the NLC feedback software simulation section.
To achieve this requires a combination of bench testing of electronic components- specifically the fast BPM processor electronics; and also testing as real a system as possible using real beams.
Obviously, the proper test of such a system requires 250 GeV colliding beams of electrons and positrons with vertical collision sizes of a few nm which will only be possible after the actual LC construction! Sites with existing long electron bunch trains where aspects of the system might be carried out have been identified as:
Of these, we are currently installing test apparatus in NLCTA to test the feedback design principles by correcting a given beam offset in as short a timescale as possible.
Bench tests of the BPM processor circuit as modelled in the simulations have been carried out at SLAC by Simon Jolly and Steve Smith. The components of this were a sine wave generator to simulate the signal produced by a stripline BPM with a band pass filter at 714MHz, an RF mixer and a 200MHz low pass filter. Figure 1 shows some results from these bench tests. Figure 1a shows the output of the sine wave generator with the rise time of the simulated bunch train. The rise time of the processor is shown in figure 1b, where the 10-90% rise time is approximately 3ns as modelled in the simulation (compare with figure 13). The processor signal is compared with the original input from the signal generator in figure 1c which shows the matching rising edge contour; the approx. 2ns time lag is due to the delay of the signal through the mixer and filter, the signal oscillation on the processor is due to crosstalk between the signal generator and processor inputs.

See here for a more detailed report (Word Document).
A test of the principal components of the NLC feedback apparatus is underway at the NLC test accelerator (NLCTA). The NLCTA layout can be seen below.

The components of the FONT experimental set-up are:
The layout of the FONT experiment in NLCTA can be seen below:

Detail of the Magnet assembly is shown below:

Detail of the X-band BPM can be seen here:

Reports on the progress of the experiment in ascending chronological order can be viewed below: