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Insertion of STC into TRT at the Department of Physics, Oxford
Credit: CERN

Professor Amanda Cooper-Sarkar

Emeritus Professor

Research theme

  • Fundamental particles and interactions

Sub department

  • Particle Physics

Research groups

  • ATLAS
Amanda.Cooper-Sarkar@physics.ox.ac.uk
Telephone: 01865 (2)73406
Denys Wilkinson Building, room 659
  • About
  • Publications

Search for dark matter produced in association with a single top quark in $\sqrt{s}=13$ TeV $pp$ collisions with the ATLAS detector

ArXiv 2011.09308 (2020)
Details from ArXiV

Measurements of Higgs Bosons Decaying to Bottom Quarks from Vector Boson Fusion Production with the ATLAS Experiment at $\sqrt{s}=$ 13 TeV

ArXiv 2011.0828 (2020)
Details from ArXiV

Search for displaced leptons in $\sqrt{s} = 13$ TeV $pp$ collisions with the ATLAS detector

ArXiv 2011.07812 (2020)
Details from ArXiV

Search for a heavy Higgs boson decaying into a $Z$ boson and another heavy Higgs boson in the $\ell\ell bb$ and $\ell\ell WW$ final states in $pp$ collisions at $\sqrt{s}$ = 13 TeV with the ATLAS detector

ArXiv 2011.05639 (2020)
Details from ArXiV

Performance of the upgraded PreProcessor of the ATLAS Level-1 Calorimeter Trigger

Journal of Instrumentation IOP Publishing 15:11 (2020) ARTN P11016

Authors:

G Aad, B Abbott, DC Abbott, A Abed Abud, K Abeling, DK Abhayasinghe, SH Abidi, OS AbouZeid, NL Abraham, H Abramowicz, H Abreu, Y Abulaiti, BS Acharya, B Achkar, L Adam, C Adam Bourdarios, L Adamczyk, L Adamek, J Adelman, M Adersberger, A Adiguzel, S Adorni, T Adye, AA Affolder, Y Afik

Abstract:

The PreProcessor of the ATLAS Level-1 Calorimeter Trigger prepares the analogue trigger signals sent from the ATLAS calorimeters by digitising, synchronising, and calibrating them to reconstruct transverse energy deposits, which are then used in further processing to identify event features. During the first long shutdown of the LHC from 2013 to 2014, the central components of the PreProcessor, the Multichip Modules, were replaced by upgraded versions that feature modern ADC and FPGA technology to ensure optimal performance in the high pile-up environment of LHC Run 2. This paper describes the features of the new Multichip Modules along with the improvements to the signal processing achieved.
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Details from ORA
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