Dr Shuxiang Cao

Abstract:

Gate set tomography (GST) characterizes the process matrix of quantum logic gates, along with measurement and state preparation errors in quantum processors. GST typically requires extensive data collection and significant computational resources for model estimation. We propose a more efficient GST approach for qudits, utilizing the qudit Hadamard and virtual Z gates to construct fiducials while assuming virtual Z gates are error-free. Our method reduces the computational costs of estimating characterization results, making GST more practical at scale. We experimentally demonstrate the applicability of this approach on a superconducting transmon qutrit.

Abstract:

Decoherence in superconducting quantum circuits, caused by loss mechanisms like material imperfections and two-level system (TLS) defects, remains a major obstacle to improving the performance of quantum devices. In this work, we present atomic-level characterization of cross-sections of a Josephson junction and a spiral resonator to assess the quality of critical interfaces. Employing scanning transmission electron microscopy combined with energy-dispersive x-ray spectroscopy and electron-energy loss spectroscopy, we identify structural imperfections associated with oxide layer formation and carbon-based contamination, and correlate these imperfections to the patterning and etching steps in the fabrication process and environmental exposure. These results suggest that TLS imperfections at critical interfaces significantly contribute to limiting device performance, emphasizing the need for an improved fabrication process.