Dr. Boon Kok Tan

Abstract:

DC blocks are used frequently in planar circuits to enable separate DC voltage/current biasing of active components inserted along the transmission lines. In this Letter, we present a slotline DC block design where the conductors of the transmission line can be physically broken, while allowing the propagation of the RF signal across the discontinuity with negligible insertion loss. The DC block comprises two break-lines with narrow gaps, patterned on the two ground planes of a slotline with each breakline connected to an RF choke. The RF chokes present open circuit nodes that prevent the RF power from leaking into the break-lines gaps. We have fabricated and tested the DC block, and demonstrated that the measured performance agrees very well with simulated results. The insertion loss was close to – 0.5 dB in the designated range of 12–16 GHz, demonstrating that the RF leakage through the DC block is indeed negligible.

Abstract:

We present a new software package for simulating the performance of Superconductor / Insulator / Superconductor (SIS) mixers. The package is called QMix (“Quasiparticle Mixing”) and it uses multi-tone spectral domain analysis (MTSDA) to calculate the quasiparticle tunneling current through the SIS junction. This technique is very powerful and it allows QMix to simulate multiple strong tones and multiple higher-order harmonics. We have compared this software to the experimental data from a 230 GHz SIS mixer, both to validate the software and to explore the measured results. Overall, we found very good agreement, demonstrating that QMix can accurately simulate the performance of SIS mixers. We believe that QMix will be a useful tool for analyzing experimental data, designing new SIS mixers, and simulating new applications for SIS junctions, such as frequency multiplication.

Abstract:

In this paper, we present preliminary measured performance of an SIS mixer employing a Nb/AIN/NbN tunnel junction in the frequency range of 780–950 GHz range. The mixer design is an upgrade of the Carbon Heterodyne Array of the Max-Planck-Institute Plus (CHAMP+) mixer, coupled with an easy to fabricate smooth-walled horn. The noise temperature of the mixer is measured using the standard Y-factor method, but all the RF optics is enclosed in the cryostat. We use a rotating mirror in the cryostat to switch between a room temperature load and a 4 K blackbody load. With this method, we have measured a noise temperature of 330 K around 850 GHz, corrected for a mismatch between a reduced height rectangular waveguide at the input of the mixer block and a full height waveguide at the output of the horn. To remove this mismatch we now plan to redesign a new mixer chip with a full-height waveguide backpiece. The expected performance of the new mixer chip is also reported.

Abstract:

We present the design of an 8-pixel Superconductor-Insulator-Superconductor (SIS) array centred at 650 GHz, which comprises two nearly identical 1×4 planar array chips, stacked together to form a 2×4 focal plane array. The array is fed by a single local oscillator (LO) source, and the array size is extendable by either increasing the number of mixing elements in the array chip or the number of stacking. The LO and RF signals for each mixer in the array are combined on-chip via a microstrip-coplanar waveguide (CPW) crossover which allows control of the RF/LO coupling level for each mixing element. The use of this planar beam splitter enables us to simplify greatly the design of the array mixer chip, as well as the design of the mixer block, which is important for future large pixel arrays. In this paper, we describe the design of the various components of the array chip, and the design of the mixer array block including the simplified LO distribution network.