A dual-polarization receiver for multi-beam interferometry
Abstract:
Superconductor/Insulator/Superconductor (SIS) mixers are today the best heterodyne receivers for detecting astronomical signals in the range from 100 GHz to 1 THz. Existing receivers have noise performance approaching the fundamental quantum limit, but large format arrays have not yet been realised. Developing large format arrays is, therefore, the most efficient method for increasing the observational speed.
In this thesis, we describe the development of a planar dual-polarisation SIS receiver. The integration of the receiver circuit on the chip with the SIS mixers for both polarisations simplifies the receiver architecture. Upon this more compact receiver design, extending to a large focal plane array with a high pixel count is simplified. The cost of this simplified receiver is the need for the development of more complicated on-chip circuits. We demonstrate this technology development in the frequency band of the wideband Submillimetre Array (wSMA) low band from 190 GHz to 290 GHz. The dual-polarisation receiver chip with a size of 4.0 mm by 4.1 mm comprises a polarisation splitting 4-probe orthomode transducer (OMT) and the mixers for each polarisation. All planar circuits are fabricated on the same quartz chip alongside some auxiliary circuits needed to connect the OMT with the mixers. We use the twin junction tuning scheme because it offers a compact and robust way of matching the highly capacitive SIS junctions.
As part of this development, we investigate the twin-junction tuning to improve the matching to the feeding RF circuit during the design phase. Furthermore, we extended existing techniques of embedding impedance recovery to apply to twin junction mixers to have a reliable tool to test our integrated receiver experimentally.
Based on these ideas, we designed an on-chip dual polarisation receiver, deployed it in a test setup and finally characterised the receiver. We describe in detail the test setup, including the 40 mm by 40 mm mixer block, which reserves margins on the size for the IF board and the magnetic bias options, and allows the extension into a 2x2-pixel 70 mm by 70 mm array. The preliminary experimental results we obtained with a single receiver chip demonstrate that sufficient local oscillator (LO) power can be coupled on the receiver chip, and it lines out a procedure for testing and characterising the receiver.
In addition, we present the design of a two-pixel balanced dual-polarisation receiver with an on-chip LO distribution. The design uses the same method we employed for the receiver chip described above but has the capability of rejecting LO noise. This design allows the construction of large format SIS receiver arrays with an improved noise temperature performance.