Development of a NbN deposition process for superconducting THz detectors and mixers
Development of millimetre-wave heterodyne array for airborne and space satellite mission
Proceedings of the 1st IEEE International Microwaves and Antennas Symposium (IMAS) in Africa IEEE
Abstract:
In this paper, we present our latest works on developing the various generic technologies to find the innovative solutions for constructing a heterodyne focal plane array, based on the Superconductor-Insulator-Superconductor (SIS) mixer technology. This includes the use of the planar superconducting circuit technology to replace the commonly used bulky waveguides or optical components, therefore simplifying the radio frequency (RF) operation and minimising the size of the array. We will describe the design of a novel easy-to-machine feed horn technology which enables deployment of large arrays with minimal cost. This technology has been demonstrated successfully and has since been deployed in various existing and up-coming telescopes. We then demonstrate these capabilities by presenting the design and built of a small pixel-count array near 220 GHz range, combining both the E- and H-polarisation chains within a single mixer block. Finally, we briefly describe our recent works on the superconducting parametric amplifier technology that could potentially replace the conventional semiconductor amplifiers that are power hungry and dissipate large amount of heat, which render the construction of large arrays difficult.Investigating pin-holes issues in Josephson junction travelling wave parametric amplifiers requiring large area of dielectric layer
Abstract:
Microwave superconducting Josephson Travelling Wave Parametric Amplifiers (JTWPAs) exploit the non-linear inductance of a long superconducting metamaterial line formed by thousands of Josephson junctions to achieve broadband parametric gain with quantum limited added noise. Nevertheless, pin-holes in the dielectric (spacer) layer required for fabricating these superconducting transmission lines (STLs) represent a challenge for JTWPAs fabrication. In this paper, we explore two pin-holes mitigation techniques, which shown promising results with DC characterisation of a suite of test structures at cryogenic temperatures. When implemented for actual JTWPA designs with much longer length, they have shown to improve the fabrication yield albeit some pin-holes still seems to exist over the large wafer area. This indicates that further mitigation effort is required to completely eradicate the pin-holes issue for applications requiring large area of dielectric layer such as microwave JTWPAs.Microstrip yagi antenna for ALMA band 11 receiver
International Journal of Terahertz Science and Technology